How to put a 74HC165 on an SPI bus? Ask Question 4 $begingroup$ If I want to read a (bunch of) 74HC165 chip(s) over an SPI port on a microcontroller, this is simple enough. Connect them through Q7 to DS on each, apply the final Q7 to MISO, notCE to SS and CP to SCK. This works fine.
On a 74HC595, pin 12 (wired to Due pin 13) is STCP, storage register clock input, while pin 14 (wired to Due pin 4) is DS, serial data input. This conflicts with your #define DATAPIN 13, #define LATCHPIN 4 statements. Maybe your other code compensates; but anyway fix it on your board and in your code and in your fritzing diagram then edit the question to match. I suggest you wire Ard pin 12 to '595 pin 12 and Ard pin 13 to '595 pin 13 to reduce cognitive dissonance. Also, wire pin 8 of the '595 directly to a ground bus, not to the LED bus that has a resistor between it and ground.–Aug 4 '15 at 1:12.
Hi Arduinoit (or Reduino?)! I need some help getting code going for reading a bunch of 74HC589 PISO shift registers over the hardware SPI.
I was surprised to not find much on this topic via google. I know I'm good hardware wise as I can read the registers by manually running all the pins but now I need to speed it up. I am using a custom board but it's running a 328 at 16MhzConnections. Serial/Parallel Load - pin 10 (SS). Latch Clock - pin 11 (MOSI). Qh output - pin 12 (MISO).
Shift Clock - pin 13 (SCK)Because of limited pin availability, I had to use SS and MOSI for those control lines. I'm hoping the SPI library will allow manual control of these.Here is a link to the data sheet:Page 8 has pin description.I really have no idea how to go about this.
I have never used the SPI library before. Apparently you have to send something to receive something?. Disclaimer; I'm no expert.It seems to me that this chip isn't using SPI, but regular serial input/output. I would just make a loop where I clocked the data out of the latch manually at the fastest rate I could manage without errors.So the setup looks like this to me:Pin 14: Serial data INPin 9: Serial data OUTPin 13: Serial shift/Parallell load - set HIGH to enable serial inputPin 11: Shift CLK - reads serial bit on RISING edgePin 10: Output enable - HIGH for high impedance, LOW for enabledWhen you shift data into it, all the data is shifted one step towards the output, and it drops the last bit that was on the output last clock cycle. So this means that if you want to 'read' the register, you lose the information at the same time. (Unless you put i right back in as you read). Well, the very first thing I tried after looking through some examples for other SPI devices worked.
I don't know how the solution is this simple but it is. Obviously this code is going to run SLOW but I'll take care of that.
The last thing I want to look into is what the transfer function is doing on Ser/Par Ld and LatchClk to see if my digitalWrites are redundant. With the right combination of SPI Mode and maybe even transfering 255 instead of 0, I may be able to be rid of those statements. I have 10 registers to read all while performing a lot of other tasks so being able to run SPI at up to 8Mhz is great.
Delay(1);digitalWrite(LatchClkpin, HIGH);delay(1);digitalWrite(LatchClkpin, LOW);delay(1);digitalWrite(SerParLdpin, LOW);delay(1);digitalWrite(SerParLdpin, HIGH);delay(1);byte data = SPI.transfer(0);By the way, for anyone who stumbles upon this. This is MODE0 and MSBFIRST. Again, this should not be regarded as example code for the above reasons. Followup The LatchClk is redundant and can simply be removed. The Ser/Par Load should work with SS but I think it would need to be inverted so it goes high during comm.
The only issue is that AVR based SPI does not seem to use the SS pin.All AVR based boards have an SS pin that is useful when they act as a slave controlled by an external master. Since this library supports only master mode, this pin should be set always as OUTPUT otherwise the SPI interface could be put automatically into slave mode by hardware, rendering the library inoperative.So either run this pin manually or modify the library to support master SS.